How do you compare equal-area floorplans with different aspect ratios?
From PDVerse PnR Interview Handbook, part of the pdVerse Mentor Guide
Short Answer
Equal area is a trap if you stop there — two floorplans with identical core area can behave completely differently in routing and timing, because area only tells you total capacity, not geometry (how far things actually have to travel). Set up a fair experiment: same macro set, same constraints (SDC, PG assumptions), same evaluation settings, and only the aspect ratio (width:height) varying between the two shapes you're testing — anything less controlled and you can't attribute differences to the shape itself.
Technical Explanation
- ).
- A near-square (close to 1:1) floorplan is usually easier for the standard-cell placer to use efficiently and tends to minimize total wire length — but a very tall or very wide chip can sometimes be forced by package or I/O constraints, in which case you're not really choosing freely.
- " If you can't explain why, you probably haven't controlled the experiment tightly enough.
- Run at least two candidate shapes with identical object counts (same macros, same cell count) so any congestion/timing delta is purely a function of geometry, not of a different netlist subset sneaking in.
Formula Or Decision Rule
For constant A: W = sqrt(A x AR), H = sqrt(A / AR).
What To Check
- Warning sign: One alternative wins timing because the constraints or scenario changed, not because of shape.
- Inspect: choose one affected region, macro, row, pin, path, or net and trace the physical cause.
- Correct: Restore identical conditions and compare named paths and hot spots.
Command Checks & Actions
initialize_floorplan-control_type core -shape R -side_ratio {<width_ratio> <height_ratio>} -core_utilization <ratio>: creates the initial die, core, rows or site array, and tracks from declared controlsreport_design-floorplan: reports the floorplan state understood by the tool
Run only the commands needed for this question. Save the report with the floorplan version and analysis context.
Healthy, Suspicious & Hard-stop Results
- Healthy: Keep area, constraints, macro set, PG assumptions, and evaluation settings constant; compare path length, row continuity, channel capacity, pin affinity, congestion, and change risk.
- Hard stop: required legality or physical feasibility is missing or unexplained.
Common Mistake
The Trap: Do not hide the symptom with an arbitrary utilisation, halo, channel, blockage, pin move, or die-size change.
What The Interviewer Is Testing
” to measurable physical evidence and an owned correction.
Follow-up Question & Model Response
"* Candidate Model Response: Model response: “I would change it if the same controlled rerun shows that one alternative wins timing because the constraints or scenario changed, not because of shape. ”
Physical Design & Planning Handbook
Master ASIC Physical Design Planning & Floorplanning
Dive into 14 comprehensive chapters covering netlist sanity, FinFET grids, macro placement, power grids, CTS, and timing budgeting.
Offline PDF Bundle
Want all 1109 questions offline?
Get the complete 4-book PDF bundle (PnR, STA, MMMC, Low Power) with a clickable table of contents - no ads, no internet needed.

Continue practising