How do you find unit mismatches across SDC and libraries?
From PDVerse PnR Interview Handbook, part of the pdVerse Mentor Guide
Short Answer
Unit mismatches are a sneaky bug class because everything still "runs" — the tool doesn't error out, it just silently computes with the wrong scale factor, and you only notice when timing numbers look absurdly good or absurdly bad. lib) file — SDC commonly uses nanoseconds while some libraries are characterized in picoseconds, and a 1000x factor slipping through unnoticed is exactly the kind of thing that turns a real violation into apparent huge positive slack (or vice versa).
Technical Explanation
- Don't just eyeball the declared unit strings — pull representative values and sanity-check them against physical intuition: does a reported clock period of "10" actually mean 10ns (plausible) or is it secretly being interpreted as 10ps (implausibly fast) or 10µs (implausibly slow) somewhere in the chain?
- Do the same for slew/transition values (should land in the tens-to-hundreds of picoseconds range for most digital designs), cell/net delays (should be in the ps-to-ns range depending on the path), and load capacitance (typically fF to low pF per pin) — a value that's off by three orders of magnitude from what's physically reasonable is your tell.
- , signoff tool) expects — since a mismatch anywhere in that chain, not just between two specific files, can corrupt results.
- "
- , a wrong
set_unitsline copy-pasted across multiple corner setups) is repeated across other files in the same flow.
What To Check
- Warning sign: A 10 ns clock becomes 10 ps or a 20 fF load is treated as 20 pF.
- Inspect: Compare one named object across the related reports; the same object should tell a consistent story.
- Correct: Fix the declaration or conversion at the producing boundary, reload cleanly, and recheck sample values.
Command Checks & Actions
- report_user_units: shows the units ICC2 uses when reading and printing values
- report_clocks: shows clock definitions and relationships
- report_ports -design_rule [get_ports *]: shows boundary constraints and electrical assumptions
Run the commands in order. Each line answers a separate part of the check.
Healthy, Suspicious & Hard-stop Results
- Expected: Compare ICC2 user units with Liberty declarations and the values expected by the STA handoff; inspect representative periods, slews, delays, and loads.
- Stop before floorplanning when required logic or timing coverage is missing or unexplained.
Common Mistake
The Trap: Do not assume the check passed just because ICC2 continued. Fix or narrowly justify the named objects, then rerun the same command.
What The Interviewer Is Testing
Be ready to explain why this matters before floorplanning.
Follow-up Question & Model Response
Model response: “I would save the report, inspect one affected object in the correct block and scenario, and make or request this correction. ”
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