How do asymmetric offsets change die dimensions?
From PDVerse PnR Interview Handbook, part of the pdVerse Mentor Guide
Short Answer
Don't assume all four sides of the core-to-die offset are equal — in real floorplans they often aren't, because different sides reserve different amounts of space for I/O cells, power rings, bond pads, or keepout margins. The rule is additive per axis: die width = core width + (left offset + right offset); die height = core height + (bottom offset + top offset). You add the actual measured offset on each side, not a single "the" offset doubled.
Technical Explanation
- Worked example: a 1000 µm core width with a 60 µm left offset and a 90 µm right offset gives a die width of 1000 + 60 + 90 = 1150 µm — notice this is NOT 1000 + 2×60 or 1000 + 2×90; you must use each side's real value.
- A common mistake is assuming symmetry because it's simpler to compute — but if your I/O ring, power straps, or scribe-line allowance genuinely differ side to side (which they often do for pad-limited or asymmetric-package designs), an assumed-symmetric calculation silently produces the wrong die size.
- Always verify offsets against the actual floorplan spec or DEF file rather than trusting a rule of thumb — this is exactly the kind of arithmetic mistake that surfaces late as a "the die doesn't match the package" problem.
Visual Verification
Die Width = Core Width + Left Margin + Right Margin. Asymmetric margins accommodate high-density I/O pad rings, analog macro keepouts, and package bond pad pitch requirements.
Formula Or Decision Rule
Die W = core W + L + R; die H = core H + B + T, all in um.
What To Check
- Warning sign: A symmetric-margin shortcut conflicts with package or power-ring needs.
- Inspect: choose one affected region, macro, row, pin, path, or net and trace the physical cause.
- Correct: Use the four approved offsets, regenerate the boundary, and verify the reported dimensions.
Command Checks & Actions
initialize_floorplan-control_type core -core_offset {<side_1> <side_2> <side_3> <side_4>}: creates the initial die, core, rows or site array, and tracks from declared controlsreport_design-floorplan: reports the floorplan state understood by the tool
Run only the commands needed for this question. Save the report with the floorplan version and analysis context.
Healthy, Suspicious & Hard-stop Results
- Healthy: Add the actual left and right offsets to core width, and the actual bottom and top offsets to core height. Do not double one offset unless both sides are truly equal.
- Hard stop: required legality or physical feasibility is missing or unexplained.
Common Mistake
The Trap: Do not hide the symptom with an arbitrary utilisation, halo, channel, blockage, pin move, or die-size change.
What The Interviewer Is Testing
” to measurable physical evidence and an owned correction.
Physical Design & Planning Handbook
Master ASIC Physical Design Planning & Floorplanning
Dive into 14 comprehensive chapters covering netlist sanity, FinFET grids, macro placement, power grids, CTS, and timing budgeting.
Offline PDF Bundle
Want all 1109 questions offline?
Get the complete 4-book PDF bundle (PnR, STA, MMMC, Low Power) with a clickable table of contents - no ads, no internet needed.
Continue practising