ExpertQuestion 90 of 161

What is the Elmore delay formula actually computing, and where specifically does it become inaccurate?

From PDVerse PnR Interview Handbook, part of the pdVerse Mentor Guide

By Tabish Iqbal, who has 9+ years of VLSI Physical Design experience

Short Answer

For an interconnect with N nodes, Elmore delay at node i is D_i = sum over k=1..N of (R_ki * C_k), where R_ki is the resistance of the path segment common to the input-to-node-i and input-to-node-k paths, and C_k is the capacitance at node k. It's popular for its algebraic simplicity and is accurate for nodes FAR from the driving point -- but can be off by orders of magnitude for nodes NEAR the driving point, because of resistive shielding: when wire resistance is comparable to or larger than the driver's output resistance, the metal resistance shields the wire's capacitance from the driver, and Elmore's simple summation doesn't capture that shielding effect.

Technical Reference DiagramWhat is the Elmore delay formula actually computing, and where specifically does it become inaccurate?

Technical Explanation

  • Elmore delay at node i: D_i = sum(k=1..N) of R_ki * C_k, where R_ki is the resistance common to the input-to-i and input-to-k paths, and C_k is the capacitance at node k.
  • It's popular specifically for its algebraic simplicity -- easy to compute, no iterative solving required.
  • It's accurate for nodes FAR from the driving point, but can be off by ORDERS OF MAGNITUDE for nodes NEAR the driving point.
  • The reason: resistive shielding. When the wire's resistance is comparable to or larger than the driver's output resistance, the metal resistance shields part of the wire's capacitance from the driver -- and Elmore's simple linear summation doesn't model that shielding effect at all.
  • Resistive shielding becomes MORE dominant with process scaling, since driver output resistance falls while wire resistance rises -- meaning Elmore's accuracy gap gets worse on more advanced nodes, not better.

Formula Or Decision Rule

D_i = sum(k=1..N) [R_ki * C_k] -- simple, but inaccurate near the driving point where resistive shielding matters most, and that inaccuracy worsens with process scaling.

What To Check

  • Warning sign: a delay estimate for a node close to its driver looks suspiciously different from a more rigorous extraction-based delay calculation for the same node.
  • Inspect: check whether wire resistance for that segment is comparable to or larger than the driver's output resistance -- exactly the condition where resistive shielding makes Elmore's estimate unreliable.
  • Correct: for near-driver nodes on resistance-comparable interconnect, use a delay-calc method that models resistive shielding (effective capacitance / k-factor) rather than trusting raw Elmore.

Command Checks & Actions

ICC2report_timing -delay_type max

Reports the tool's actual delay-calc result, which uses effective-capacitance modeling to correct for resistive shielding, not raw Elmore delay directly.

Healthy, Suspicious & Hard-stop Results

  • Expected: delay-critical nodes near a driver are analyzed with effective-capacitance-corrected delay calculation, not raw Elmore delay.
  • Investigate: a hand-estimate using raw Elmore delay near a driving point diverges significantly from the tool's real delay-calc result -- expected, given Elmore's documented near-driver inaccuracy, not necessarily a tool bug.
  • Stop: a manual timing estimate for a near-driver node uses raw Elmore delay as if it were signoff-accurate, ignoring the documented resistive-shielding limitation.

Common Mistake

The Trap: Trusting Elmore delay as accurate everywhere along an interconnect just because it's simple to compute -- it's specifically inaccurate near the driving point, exactly where resistive shielding matters most, and that gap widens on advanced process nodes.

What The Interviewer Is Testing

Whether you know exactly WHERE Elmore delay breaks down (near the driving point, due to resistive shielding) and WHY that gets worse with scaling, not just that "Elmore delay is an approximation."

Practical Example

Debug Scenario: A hand-calculated Elmore delay estimate for a node close to its driver disagrees substantially with the tool's actual delay-calc result. The discrepancy traces to resistive shielding -- the wire's resistance in that region is comparable to the driver's output resistance, exactly the condition Elmore's simple summation doesn't model correctly.

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