What is Half-Perimeter Wire Length (HPWL), and why is it used in Global Placement?
From PDVerse PnR Interview Handbook, part of the pdVerse Mentor Guide
Short Answer
HPWL is the cheapest useful stand-in for "how long will this net's wiring be": draw the smallest bounding box around all the net's pins, and HPWL is just (width + height) of that box. It's fast for a reason — global placement has to evaluate millions of candidate cell moves per second, and there's no time to run real routing on each trial, so HPWL gives an O(N) estimate instead.
Technical Explanation
- HPWL is the cheapest useful stand-in for "how long will this net's wiring be": draw the smallest bounding box around all the net's pins, and HPWL is just (width + height) of that box.
- It's fast for a reason — global placement has to evaluate millions of candidate cell moves per second, and there's no time to run real routing on each trial, so HPWL gives an O(N) estimate instead.
- For 2-pin and 3-pin nets, HPWL happens to equal the exact minimum Steiner tree length; for nets with more pins it slightly underestimates, typically by a factor of about 1.05–1.15x versus the true rectilinear Steiner minimum tree.
- Because raw HPWL has sharp corners that are hard to optimize with gradient-based methods, analytical placers smooth it out (log-sum-exp or weighted-average wirelength) — but the underlying limitation stays: HPWL knows nothing about routing layer directions, detours around blockages, or local congestion, so it's a placement-time proxy, not a routing guarantee.
Common Mistake
The Trap: Assuming HPWL is the exact wirelength that will appear in the routed SPEF. Actual routed wirelength is always 10% to 25% higher than HPWL due to via layer transitions and detour routing.
Follow-up Question & Model Response
"When does HPWL underestimate wirelength most severely?"
Candidate Model Response: When a net connects pins located on opposite sides of a large hard macro blockage, forcing the router to make long U-shaped detours around the macro.
Practical Example
Reporting Placement Wirelength:
# Synopsys ICC2: Report total estimated wirelength across all nets
report_wire_length -estimate
# Cadence Innovus: Report HPWL and Steiner estimates
reportWirePnR Flow Mentor Guide
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