Secondary PG constraints conflict or leave dual-rail cells unplaceable. What do you do?
From PDVerse Low-Power Physical Design Mentor Guide, part of the pdVerse Mentor Guide
Short Answer
Secondary PG constraints tell the placer where each secondary supply really has straps, and they conflict when user regions, tool-derived regions, the UPF and the netlist disagree. Run check_secondary_pg_placement_constraints (ICC2), read which pairs disagree, fix the source rather than relying on commit-time resolution, and re-commit. If dual-rail cells still cannot be placed, the allowed regions are too small for them, so widen the margin, add straps or relax the cell-type filter.
Technical Explanation
- Default: ICC2 assumes secondary straps exist everywhere in a VA; constraints narrow that to where they really are, so dual-rail cells sit near them.
- Two ways in:
create_secondary_pg_placement_constraints(ICC2) needs-layersor-region;derive_secondary_pg_placement_constraints(ICC2) reads strap shapes on the layers you list. - Exclusion:
-exclude_supplymakes a UPF supply physically unavailable, but not for the primary, a supply already used by a cell, or one named in a strategy. - Commit resolves silently: for example, the same supply with both
-supplyand-exclude_supplykeeps-supplywith only a warning. - Unplaceable cells: regions too narrow, a
-lib_cell_typesfilter that bans the cell type, or no advanced legalizer, which these constraints require. - Re-commit rule: after any change to constraints, floorplan or UPF, run
commit_secondary_pg_placement_constraints(ICC2) again.
# [ICC2] icc2_shell
derive_secondary_pg_placement_constraints -layers {M9} -margin 15
create_secondary_pg_placement_constraints -name ret_vdd1p0 -supply VDD1p0 -layers {M9} -margin 15 -voltage_areas VA_COP -lib_cell_types {retention_registers isolation_cells}
check_secondary_pg_placement_constraints
report_secondary_pg_placement_constraints
commit_secondary_pg_placement_constraints
check_legalityWhat To Check
- check_secondary_pg_placement_constraints reports no conflicts before commit.
- Every dual-rail cell type has an allowed region in its VA.
- Allowed region area comfortably exceeds the dual-rail cell area.
- Constraints were re-committed after the last floorplan or UPF change.
Command Checks & Actions
derive_secondary_pg_placement_constraints -layers {M9} -margin 15Derive constraints from real strap shapes
create_secondary_pg_placement_constraints -name ret_vdd1p0 -supply VDD1p0 -layers {M9} -margin 15 -voltage_areas VA_COPAdd a user constraint for one supply and VA
check_secondary_pg_placement_constraintsFind conflicts with the UPF, netlist, straps and derived constraints
report_secondary_pg_placement_constraintsList committed and uncommitted constraints, user or derived
check_legalityFind cells that violate placement constraints
Healthy, Suspicious & Hard-stop Results
- Healthy (illustrative): No conflicts, and all 400 retention flops in VA_COP sit within 15 um of a VDD1p0 strap.
- Suspicious (illustrative): Commit printed warnings that it ignored an exclude constraint, and nobody checked which one.
- Hard stop: check_legality shows 60 retention flops outside any allowed region, or dual-rail cells sit where the supply is excluded.
Common Mistake
The Trap: Letting commit resolve conflicts and moving on because it did not error.
- The tool keeps one side of each conflict with a warning, so the placement may follow a region you meant to remove, and cells land far from real straps.
What The Interviewer Is Testing
- Do you know why these constraints exist, not only the command names?
- Would you read commit warnings instead of trusting automatic resolution?
Follow-up Question & Model Response
"How do these constraints work in a hierarchical design?"
Candidate Model Response: You create and commit secondary PG constraints for each block, then at the top. At the top, commit_secondary_pg_placement_constraints -commit_subblocks (ICC2) also commits any uncommitted block constraints. report_secondary_pg_placement_constraints -all_blocks (ICC2) lists them all, and the check command takes -blocks to test specific blocks. Keep block strap plans and top constraints in step, or the block view and top view disagree.
Practical Example
Design Scenario: (illustrative) VA_COP has 400 retention flops and 180 dual-rail isolation cells on VDD1p0, with M9 straps in only two columns. The derived constraints with a 15 um margin give room for 340 flops, so check_legality flags 60. A user constraint also excluded VDD1p0 in the lower half, which commit ignored with a warning because a strategy uses VDD1p0. The team removes the stale exclude, adds a third strap column, and all 400 place legally.
Low-Power & UPF Handbook
Master Low-Power VLSI & Multivoltage Design
Read the complete low-power guide library covering power domains, level shifters, isolation clamps, state retention, and UPF signoff verification.
Offline PDF Bundle
Want all 1109 questions offline?
Get the complete 4-book PDF bundle (PnR, STA, MMMC, Low Power) with a clickable table of contents - no ads, no internet needed.

Continue practising