ExpertQuestion 10 of 10Source page 19

An engineer tells you "timing is clean." As the signoff lead, what do you ask before accepting that statement?

From PDVerse MMMC Interview Masterclass, part of the pdVerse Mentor Series

Direct answer

As signoff lead, ask for the complete signoff audit evidence: (1) Was the full signoff matrix active (all modes × all corners)? (2) Is check_timing clean with zero unconstrained endpoints? (3) Is parasitic annotation 100% verified via report_annotated_parasitics? (4) Was PrimeTime SI crosstalk enabled? (5) Were PBA reports run on near-critical paths? (6) Are min-pulse-width and max-transition design rules clean?

Technical Reference DiagramAn engineer tells you "timing is clean." As the signoff lead, what do you ask before accepting that statement?

Mentor explanation

Defensible timing signoff requires a rigorous multi-point verification checklist.

Key terms

  • Signoff Matrix Audit — verify all_setup_analysis_views and all_hold_analysis_views cover 100% of required views.
  • check_timing clean — zero unconstrained clocks, unconstrained endpoints, or combinatorial loops.
  • 100% SPEF Annotation — zero unannotated nets or defaulted wire parasitics.
  • PrimeTime SI Enabled — crosstalk delta delay and glitch noise active across all scenarios.
  • PBA Verification — path-based analysis confirmed on all zero/negative slack paths.
  • Design Rule Checks (DRC) — zero max-transition, max-capacitance, or min-pulse-width violations.

Never accept a simple WNS=0.000 ps summary without verifying that all signoff gates, constraints, and parasitics are 100% verified.

Practical example

Signoff Gate Audit Checklist Table:

+----+--------------------------------+----------------------------+--------+
| #  | Signoff Audit Check            | Golden Verification Command| Status |
+----+--------------------------------+----------------------------+--------+
| 1  | 100% Active View Coverage      | all_setup / all_hold views | [PASS] |
| 2  | 100% SPEF Annotation Match     | report_annotated_parasitics| [PASS] |
| 3  | PrimeTime SI Crosstalk Active  | report_si_delay_analysis   | [PASS] |
| 4  | POCV + CRPR Enabled            | report_ocvm / report_crpr  | [PASS] |
| 5  | 0 Unconstrained Endpoints      | check_timing -verbose      | [PASS] |
| 6  | PBA Critical Path Validation   | report_timing -pba_mode    | [PASS] |
+----+--------------------------------+----------------------------+--------+

Interview trap

Accepting a raw WNS=0.000 ps summary without verifying that constraints, views, parasitics, and DRCs are 100% sound. A design can show WNS=0 simply because paths were unconstrained or views unactivated.

Key takeaways

  • Timing clean is a multi-dimensional proof, not a single slack number.
  • The 6-pillar audit checks View Coverage, SPEF Annotation, SI Crosstalk, POCV+CRPR, SDC Exceptions, and check_timing.
  • Zero unconstrained endpoints and peer-reviewed waivers are mandatory before tapeout signoff sign-off.
Self-check: can you answer this aloud?

Try a 45-second answer using this structure:

  1. State the direct answer.
  2. Explain the timing or physical reason.
  3. Name one caveat.
  4. Say how you would verify it in a real flow.

MMMC Signoff Guide

Explore the full 10-chapter MMMC guide on modes, PVT corners, RC parasitics, analysis views, and correlation between implementation and signoff tools.

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Static Timing Analysis (STA) Handbook — ten chaptersSTA HandbookTen chapters on setup, hold, OCV, and PrimeTime signoff.