What is an isolation cell and why is it needed?
From PDVerse Low-Power Physical Design Mentor Guide, part of the pdVerse Mentor Guide
Short Answer
An isolation cell is a small gate on a signal leaving a domain that can switch off, and it forces that signal to a known value while the domain is off. It exists because an unpowered driver leaves the net floating, and the always-on receiver would otherwise read garbage and leak current. The cell is powered from a supply that stays on and is controlled by an enable from always-on logic.
Technical Explanation
- An isolation cell is usually an AND or OR gate: one input is the data, the other is the isolation enable.
- With isolation off, data passes straight through; with it on, the output is clamped to 0 or 1.
- The cell must run on an always-on supply; if it shared the dead rail, the clamp would die too.
- Its enable comes from the always-on power controller and is asserted before the switch opens.
- In IEEE 1801-2015,
set_isolation(UPF) names the domain, ports,-clamp_value,-isolation_supply,-isolation_signaland-isolation_sense. - Legacy form (still accepted by ICC2/PT):
-isolation_power_netonset_isolation(UPF), with the enable inset_isolation_control(UPF). - A missing cell leaves a floating input in live logic: crowbar current and random behaviour during shutdown.
Common Mistake
The Trap: Thinking isolation "blocks" the signal, so any gate will do.
- The job is to substitute a specific safe value, and the wrong clamp value can fire a request or hold a reset in the live domain.
- Pick the clamp per signal, from what the receiver treats as inactive.
Follow-up Question & Model Response
"Where does the isolation cell physically sit: inside the off domain or in the always-on domain?"
Candidate Model Response: Either can work, and -location self or -location parent on set_isolation (UPF) picks it. Inside the switchable domain the cell needs an always-on secondary supply, so you need a dual-rail isolation cell there. In the always-on parent it can use that domain's normal rail. The rule that never changes is that its supply must stay on while the source is off.
Practical Example
Design Scenario: (illustrative; ISO_AND_X1 is an illustrative cell name) PD_COP drives irq into PD_MYCHIP. An ISO_AND_X1 cell sits on irq, powered by VDD1p0, with its enable driven by U_PC/ISE through an inverter so the AND input is low during isolation. Before PD_COP shuts down, U_PC asserts ISE and irq is held at 0. The interrupt controller in PD_MYCHIP sees "no interrupt" for the entire off period instead of a floating line. On wake-up, U_PC releases ISE only after VDD1p0_SW is back and irq is valid again.
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