BeginnerQuestion 44 of 50

What is bus-invert encoding, and how does it reduce switching activity on a wide data bus?

From PDVerse Low-Power Physical Design Mentor Guide, part of the pdVerse Mentor Guide

By Tabish Iqbal, who has 9+ years of VLSI Physical Design experience

Short Answer

Bus-invert encoding sends either the data word or its complement, whichever flips fewer wires compared with the value already on the bus. One extra flag wire tells the receiver which version it got, capping toggles at about half the bus width per transfer. The saving is largest on long, busy buses carrying random data.

Table of an 8-bit bus: previous value 00000000, next value 11111110, plain send toggles 7 wires, inverted send 00000001 plus INV flag toggles 2 wires. — Technical Reference DiagramWhat is bus-invert encoding, and how does it reduce switching activity on a wide data bus?

Technical Reference DiagramWhat is bus-invert encoding, and how does it reduce switching activity on a wide data bus?

Technical Explanation

The encoder counts how many bits would change (the Hamming distance) between the new word and the current bus value.
If more than half the N bits would flip, it sends the inverted word and sets the INV flag.
Worst-case toggles drop from N to about N/2 per transfer, plus the flag wire.
Long buses have high capacitance, so fewer toggles directly cut dynamic power.
The cost is encode/decode logic at both ends and the extra wire, which add delay and area.
The receiver decodes with one XOR per bit against INV, which is cheap but sits on the receive path.
It helps random, high-activity data; a quiet control bus gains little.

# Conceptual (not a tool command)
flips = popcount(new_word XOR bus_now)
if flips > N/2:
    drive(~new_word); INV = 1
else:
    drive(new_word); INV = 0

Common Mistake

The Trap: Adding bus-invert on every bus without checking the data statistics.

On low-activity or sequential buses the saving is tiny, while the encode logic and extra wire still cost power, area and timing.
The popcount logic switches on every transfer, so on a short bus it can burn more than the wires it saves.

Follow-up Question & Model Response

"How would you decide whether a bus deserves bus-invert?"

Candidate Model Response: Look at real switching activity for that bus from simulation. If its toggle rate is high and its data looks random, and it is long enough that wire capacitance dominates, it is a candidate. Estimate the saving against the power of the encoder and decoder. If the address is mostly sequential, Gray code is usually the better fit.

Practical Example

Design Scenario: (illustrative) An 8-bit bus holds 00000000 and the next word is 11111110. Sending it plain flips 7 wires. The encoder sends 00000001 with INV = 1 instead: 1 data wire plus the flag, so 2 toggles. The receiver inverts the word back to 11111110. Over a long run of random 8-bit words, plain sending averages 4 toggles per transfer and bus-invert about 3.4 including the flag, roughly 16% fewer. The flag wire itself toggles only when the choice flips between plain and inverted.

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