What is retention supply architecture, and what does -retention_supply / -use_retention_as_primary control?

Short Answer

A retention flop keeps its normal-mode logic on the switched primary, VDD1p0_SW, and its shadow latch on an always-on retention supply, VDD1p0. You name that supply with -retention_supply on set_retention (UPF), or with the legacy net options. -use_retention_as_primary (UPF) goes further: the register and its output run from the retention supply, which changes the driver supply that isolation and level-shifter strategies see.

Technical Explanation

• Split supply: normal-mode logic runs on the domain primary; the shadow latch runs on the retention supply, which stays on while the primary is off.
• Modern: -retention_supply SS_AON (UPF) names a supply set, and its power and ground become the retention rails.
• Legacy form (still accepted by ICC2/PT): -retention_power_net and -retention_ground_net (UPF). Give only one and ICC2 takes the other from the domain primary.
• Physically: retention cells have a secondary PG pin that taps an always-on VDD1p0 strap running through the switched area.
• Use as primary: with -use_retention_as_primary (UPF) the register output is driven from the retention supply, so its fanout sees an always-on driver.
• That changes source analysis for isolation, shifters and repeaters, and ICC2 maps only cells whose outputs relate to the backup pin. The option cannot be updated.
• For implementation, 1801-2015 makes a missing retention supply an error; only simulation assumes an anonymous always-on supply.

# [UPF]  mychip.upf
create_supply_set SS_AON -function {power VDD1p0} -function {ground VSS}
set_retention RET_COP -domain PD_COP -retention_supply SS_AON -save_signal {save high} -restore_signal {restore high}
set_retention RET_COP_OUT -domain PD_COP -elements {U_COP/status_reg} -retention_supply SS_AON -save_signal {save high} -restore_signal {restore high} -use_retention_as_primary
map_retention_cell RET_COP -domain PD_COP -lib_cells {RDFF_X1}
# [ICC2]  icc2_shell
report_mv_cells -retention -verbose

What To Check

• The retention supply is on in every state where PD_COP is off.
• Every retention cell has its backup PG pin on VDD1p0, not VDD1p0_SW.
• Strategies with -use_retention_as_primary (UPF) map to cells whose outputs relate to the backup pin.
• Isolation on the outputs of those registers is reviewed, since their driver is now always-on.

Healthy, Suspicious & Hard-stop Results

• Healthy (illustrative): report_mv_cells -retention (ICC2) shows 2,400 retention cells in PD_COP, all with backup pins on VDD1p0.
• Suspicious (illustrative): Some RET_COP_OUT registers map to cells whose output relates to the primary pin, which breaks the use-as-primary intent.
• Hard stop: The retention supply is VDD1p0_SW, or any net that is off while PD_COP is off: nothing survives shutdown.

What The Interviewer Is Testing

• Whether you can say which part of a retention flop sits on which supply.
• Whether you know what -use_retention_as_primary changes downstream.

Follow-up Question & Model Response

"Can the retention supply run at a lower voltage than the primary?"

Candidate Model Response: Yes, the ICC2 MV UG says retention power and ground can differ from the domain primary. The shadow latch only has to hold a value, so a lower always-on rail saves leakage during shutdown. The library cell has to handle that voltage difference on save and restore. With -use_retention_as_primary the output also swings at the retention voltage, so check level shifting on its fanout.