Why can the exact same physical path pass timing in one view and fail in another?
From PDVerse MMMC Interview Masterclass, part of the pdVerse Mentor Series
Direct answer
A path's physical gates and wires are identical across views, but its operational frequency (mode), cell switching speeds (PVT corner), wire delays (RC corner), and active timing exceptions differ between views, producing different arrival and required times in each view.
Mentor explanation
Slack varies across views because timing constraints and physical delays change with mode and corner.
Key terms
- Mode/frequency shift — a path may see a 1 GHz functional clock in one view and a 50 MHz test clock in another, altering required time.
- PVT delay shift — cells switch 2–3x faster at FF/-40°C than at SS/125°C, turning a safe setup path into a fast hold race.
- RC dominance shift — long routes can pass under Cworst (low resistance) but fail under RCworst (high resistance).
- Exception scope — a multicycle path in functional mode may not apply in scan capture mode, tightening the path to single-cycle timing.
Passing timing in one view proves nothing about other views. Every path must clear setup and hold across all active views simultaneously.
Practical example
Path Slack Comparison Across Views:
Path: U_ALU/reg_a_reg[0]/CK -> U_ALU/reg_out_reg[0]/D
• View func_ss_rcmax (Setup, 1GHz): Arrival = 0.85ns, Required = 0.95ns -> Slack = +100ps (PASS)
• View func_ff_rcmin (Hold, 1GHz): Arrival = 0.12ns, Required = 0.22ns -> Slack = -100ps (FAIL!)
• View scan_ss_rcmax (Setup, 50MHz):Arrival = 0.85ns, Required = 19.5ns -> Slack = +18.65ns (PASS)Interview trap
Assuming a path is safe because it passed in the primary functional setup view. It must be verified against fast-corner hold and test-mode constraints separately.
Key takeaways
- Physical topology is constant, but timing constraints, cell delays, and wire delays shift per view.
- A path passing setup in a slow corner can easily fail hold in a fast corner.
- Signoff closure requires 100% positive slack across all active views simultaneously.
Self-check: can you answer this aloud?
Try a 45-second answer using this structure:
- State the direct answer.
- Explain the timing or physical reason.
- Name one caveat.
- Say how you would verify it in a real flow.
MMMC Signoff Guide
Master Multi-Mode Multi-Corner Timing Signoff
Explore the full 10-chapter MMMC guide on modes, PVT corners, RC parasitics, analysis views, and correlation between implementation and signoff tools.
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