What are parasitics, and what is SPEF?
From PDVerse STA Mentor Guide, part of the pdVerse Mentor Guide
Short Answer
Parasitics are the resistance and capacitance a routed wire has simply by existing as metal near other metal and near the substrate. SPEF (Standard Parasitic Exchange Format) is the file format used to carry those extracted values from the layout tool into the STA tool.
Technical Explanation
Nobody designs a wire's resistance or capacitance on purpose — they come along for free with the act of routing metal, which is exactly why the word parasitic fits.
- Wire resistance: every routed segment has some finite resistance, since real metal is not a perfect conductor, and thinner or longer wires carry more of it.
- Ground capacitance: a wire also forms a capacitor with the substrate and with power or ground planes beneath it, simply from sitting near them.
- Coupling capacitance: a wire forms a second, sideways capacitor with any neighboring wire routed close to it on the same or an adjacent layer — this coupling is the physical root of crosstalk.
- What SPEF actually carries: for each net, a distributed network of small resistors and capacitors, plus explicit coupling capacitor entries between that net and specific neighboring nets.
- Why one SPEF is not enough: parasitics shift with process and temperature just like transistors do, so signoff extracts several SPEF corners — at minimum a max-resistance and a min-resistance version — rather than trusting one typical extraction everywhere.
Common Mistake
The Trap: Extracting and signing off against a single, typical-case SPEF file for every corner.
- Interconnect resistance and capacitance genuinely shift with process and temperature, the same way cell delay does.
- Setup needs a max-resistance, max-capacitance extraction, while hold needs the opposite minimum-resistance version — one SPEF file cannot honestly represent both.
Follow-up Question & Model Response
What is the practical difference between a lumped SPEF and a distributed SPEF?
Candidate Model Response: A lumped SPEF collapses an entire net's parasitics into one total capacitance value, which is fast to load but throws away exactly where along the wire that capacitance sits. A distributed SPEF instead preserves the wire as a real chain of small resistor and capacitor segments, which lets the tool compute a much more accurate delay and slew, especially on long or high-fanout nets where the signal genuinely degrades as it travels. Signoff-quality STA relies on distributed SPEF for that reason, even though it costs more runtime to process.
Practical Example
A clock-enable net with three neighboring aggressor wires shows a coupling capacitance entry of 0.018 pF to one specific neighbor in its SPEF record. That single coupling value, not the net's own ground capacitance, is what a downstream crosstalk analysis uses to decide whether that neighbor's switching can meaningfully delay or glitch this net.
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