BeginnerQuestion 29 of 95

What are PVT corners, and why does timing change across them?

From PDVerse STA Mentor Guide, part of the pdVerse Mentor Guide

By Tabish Iqbal, who has 9+ years of VLSI Physical Design experience

Short Answer

PVT corners are combinations of Process, Voltage, and Temperature that real chips will actually experience across manufacturing spread and normal operating conditions. Timing shifts noticeably across them because the physical speed of a transistor depends on all three.

Setup delay versus temperature for the same path at two supply voltages, showing the worst setup corner flip from hot at 0.9V to cold at 0.6V — Technical Reference DiagramWhat are PVT corners, and why does timing change across them?

Technical Reference DiagramWhat are PVT corners, and why does timing change across them?

Technical Explanation

No two manufactured chips are perfectly identical, and no chip runs at one fixed voltage and temperature forever, so the tool must check timing across the whole range it will actually see.

Process (P): manufacturing naturally varies a transistor's physical dimensions and threshold voltage slightly from chip to chip, which the tool bounds with named corners such as slow-slow and fast-fast.
Voltage (V): a higher supply voltage pushes more current through a switching transistor, so it switches faster; a lower voltage slows it down.
Temperature (T), the ordinary case: at typical supply voltages, higher temperature reduces carrier mobility inside the transistor, so cells switch slower when hot.
Temperature inversion, the exception: at the very low voltages common on advanced processes, threshold voltage rises faster with cooling than mobility improves, so the coldest corner can actually become the slowest one for a setup check.
What this means in practice: the tool has to check both temperature extremes for setup, not just the traditionally hot one, wherever a design's operating voltage is low enough to reach that inversion region.

Common Mistake

The Trap: Assuming hot is always the worst-case setup corner, out of habit from older, higher-voltage processes.

On a low-voltage advanced process, temperature inversion can make the coldest corner the slowest one instead.
Skipping the cold corner for setup on such a design can let a real violation through signoff unnoticed.

Follow-up Question & Model Response

Why can two different paths on the same chip respond to temperature in opposite directions?

Candidate Model Response: Different cells on the same chip can use different threshold-voltage flavors, and temperature inversion affects a low-threshold cell differently than a high-threshold one, so one path can get faster while another gets slower over the same temperature change. This is why signoff cannot assume one path's behavior represents the whole chip, and why both hot and cold corners get checked for setup on any design running at a low enough voltage to reach the inversion region.

Practical Example

A 5 nm design running at 0.6 V shows its worst setup slack at -40°C rather than at 125°C, the opposite of what the same design would show at 0.9 V. Signoff runs both temperature extremes for setup specifically to catch this reversal, rather than assuming the hot corner is always worst.

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