What are the advanced level-shifter placement strategies (self/parent/fanout/automatic/sibling), and how do you choose?

Short Answer

The ICC2 MV UG documents automatic, self, parent and other as -location values for set_level_shifter (UPF), and IEEE 1801-2015 also lists fanout; there is no sibling value in either. -rule and -threshold decide which crossings a strategy covers, and when strategies overlap ICC2 ranks -elements (port over instance over domain) first, then -no_shift, then -source or -sink, then the rest. Choose the location where both supplies are available and the fanout stays cheap.

Technical Explanation

• automatic: the tool chooses. The ICC2 MV UG calls it the default, while IEEE 1801-2015 names self as the standard default.
• self: inside the model or cell being shifted. parent: in the parent of that cell.
• other: in the parent domain for an upper-boundary port, or the child domain for a lower-boundary port.
• fanout (IEEE 1801-2015): at the sinks, which suits receivers at different voltages; the ICC2 GUI draws a location-fanout symbol for it.
• Filters: -rule low_to_high|high_to_low|both and -threshold (UPF). A threshold of 0 means any voltage difference needs a shifter.
• Precedence (same domain): -elements, then -no_shift, then -source or -sink, then everything else; -applies_to has no effect.
• What breaks: if the chosen location lacks the input or output supply, the tool inserts no shifter and the crossing stays unfixed.

# [UPF]  mychip.upf
set_level_shifter LS_DSP_OUT -domain PD_DSP -applies_to outputs -rule both -threshold 0.05 -location self
set_level_shifter LS_IRQ -domain PD_DSP -elements {U_DSP/irq} -rule both -location parent
set_level_shifter LS_CPU_IN -domain PD_CPU -applies_to inputs -rule high_to_low -no_shift
# [ICC2]  icc2_shell
create_mv_cells -level_shifter
analyze_mv_design -level_shifter -through U_DSP/irq

What To Check

• The domain at each location has both the input and the output supply available.
• -rule and -threshold match the library: low-to-high always shifted, high-to-low only where the library needs it.
• No two strategies tie on the same port.
• A net whose receivers sit at different voltages gets one shifter per voltage.

Healthy, Suspicious & Hard-stop Results

• Healthy (illustrative): After create_mv_cells (ICC2), every PD_DSP output into 1.0 V logic has a shifter in PD_DSP, and irq has one in PD_MYCHIP.
• Suspicious (illustrative): analyze_mv_design -level_shifter (ICC2) on U_DSP/irq says the input supply VDDdsp is not available in the parent domain.
• Hard stop: A low-to-high crossing has no shifter because a -no_shift (UPF) strategy outranked the one meant to cover it.

What The Interviewer Is Testing

• Whether you know the real -location values and that sibling is not one of them.
• Whether you can apply the level-shifter precedence order to a real conflict.

Follow-up Question & Model Response

"What does ICC2 do when one boundary pin feeds receivers at two different voltages?"

Candidate Model Response: ICC2 can insert one shifter before the boundary pin and more than one after it. In the ICC2 MV UG example a VDD1 net feeds loads on VDD2 and VDD3, and each branch gets its own shifter. That heterogeneous fanout is the case the fanout location is meant for. Each shifter still needs its supplies available where it lands.