What happens if an isolation cell has the wrong clamp value, and how would this surface during verification?
From PDVerse Low-Power Physical Design Mentor Guide, part of the pdVerse Mentor Guide
Short Answer
The clamp value is what the always-on receiver sees while the source domain is off, so it must be the inactive level of that signal: 0 for an active-high enable, 1 for an active-low reset. Get it wrong and the receiver acts on a fake event as soon as isolation turns on, such as starting a DMA or resetting a block. Power-aware simulation shows it as a spurious event at shutdown, and static checks catch it only when the intended clamp is written down with set_port_attributes -clamp_value (UPF).
Technical Explanation
- Mechanism: while ISE is active, the isolation cell forces the crossing to 0 or 1, whatever the dead source does.
- Rule: clamp to the inactive level at the receiver. An AND-style cell clamps 0 and an OR-style cell clamps 1.
- Wrong clamp: the receiver sees an asserted signal for the whole off period, and edge-triggered logic fires once at entry.
- Simulation: the source goes X as its rail decays, the output jumps to the clamp value, and the receiver reacts right after ISE rises.
- Static: VC LP reports ISO_CLAMP_DEFAULT when a strategy has no clamp, and ISO_CLAMP_OVERRIDE when a port attribute clamp overrides the strategy clamp on that port.
- No tool knows your polarity unless you record it, so put
set_port_attributes -clamp_value(UPF) on the ports that matter. - What breaks: clamp 1 on an active-high dma_start starts a transfer every time PD_COP powers down.
# [UPF] mychip.upf
set_isolation ISO_COP -domain PD_COP -applies_to outputs -isolation_supply SS_AON -clamp_value 0 -isolation_signal ISE -isolation_sense high
set_isolation ISO_COP_RST -domain PD_COP -elements {U_COP/rst_n_out} -isolation_supply SS_AON -clamp_value 1 -isolation_signal ISE -isolation_sense high
set_port_attributes -ports {U_COP/dma_start} -clamp_value 0
# [VC LP] vc_static_shell
read_file -format verilog mychip.v
read_upf mychip.upf
check_lp -stage upf
report_violations -app LPWhat To Check
- For every PD_COP output, the clamp equals the inactive level at the receiver.
- Active-low resets and enables get clamp 1 and map to an OR-style cell.
- The ports that matter carry
set_port_attributes -clamp_value(UPF), so VC LP can compare. - Power-aware simulation covers the shutdown entry, not only the steady off state.
Command Checks & Actions
set_port_attributes -ports {U_COP/dma_start} -clamp_value 0Records the clamp the receiver needs, so a static checker can compare
check_lp -stage upfRuns the static low-power checks on the power intent
report_violations -app LPLists tags such as ISO_CLAMP_OVERRIDE and ISO_CLAMP_DEFAULT
Healthy, Suspicious & Hard-stop Results
- Healthy (illustrative):
report_violations(VCLP) shows no ISO_CLAMP_OVERRIDE that changes a clamp value, and simulation holds dma_start at 0 for the whole off period. - Suspicious (illustrative): ISO_CLAMP_DEFAULT on a strategy with no clamp: 0 was assumed, right for dma_start but wrong for rst_n_out.
- Hard stop: ISO_CLAMP_OVERRIDE on U_COP/dma_start: the strategy clamps 1 and the port attribute overrides it to 0, so the UPF disagrees with itself.
Common Mistake
The Trap: Choosing clamp 0 for every output because 0 feels like the safe value.
- An active-low reset clamped to 0 holds its receiver in reset for the whole shutdown, and an active-low interrupt looks asserted.
What The Interviewer Is Testing
- Whether you tie the clamp value to the receiver polarity, not to habit.
- Whether you know how simulation and static checks each expose a wrong clamp.
Follow-up Question & Model Response
"When would you choose a latch clamp instead of 0 or 1?"
Candidate Model Response: Use latch when the receiver must keep the last valid value the source drove, such as a mode bit read by always-on logic. The isolation cell captures the value when ISE rises and holds it through the off period. A fixed 0 or 1 would change that bit at every shutdown. The library must provide a latch-style isolation cell.
Practical Example
Design Scenario: (illustrative) U_COP drives dma_start (active high) and rst_n_out (active low) into PD_MYCHIP. Someone changes ISO_COP from clamp 0 to 1 to fix rst_n_out. At the next shutdown ISE rises, dma_start jumps to 1, and the always-on DMA engine starts a transfer from a powered-off memory. The fix is ISO_COP at 0 plus ISO_COP_RST with clamp 1 on rst_n_out only; ISO_AND_X1 and ISO_OR_X1 are illustrative cell names.
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