What are the different isolation clamp values (0, 1, latch), and when would you use each?

Short Answer

The clamp value is what the isolation cell drives while its source domain is off: 0 (an AND-type cell, the ICC2 default), 1 (an OR-type cell) or latch (holds the last value). Choose it signal by signal, from what the always-on receiver treats as inactive, not one value per domain. Active-high enables clamp to 0, active-low resets clamp to 1, and buses that must keep their last value use latch.

Technical Explanation

• Clamp 0: AND-type cell. Right for active-high enables, requests, valids and interrupts, so the receiver sees "idle".
• Clamp 1: OR-type cell. Right for active-low resets and selects, so the receiver is not held in reset or selected.
• Latch: holds the value present when isolation turned on. Use it for configuration or status the receiver keeps using.
• A latch cell with an asynchronous set or reset pin needs -async_set_reset on set_isolation (UPF) in ICC2.
• Clamp 0 with no supply: -isolation_supply {} with clamp 0 lets ICC2 use a single-rail NOR-style cell.
• A wrong clamp is functionally silent in synthesis: the receiver acts on a fake event during every shutdown.

# [UPF]  mychip.upf
set_isolation ISO_COP_EN -domain PD_COP -elements {U_COP/req U_COP/irq} -isolation_supply SS_AON -clamp_value 0 -isolation_signal U_PC/ISE -isolation_sense high
set_isolation ISO_COP_RSTN -domain PD_COP -elements {U_COP/rst_n} -isolation_supply SS_AON -clamp_value 1 -isolation_signal U_PC/ISE -isolation_sense high
set_isolation ISO_COP_CFG -domain PD_COP -elements {U_COP/cfg} -isolation_supply SS_AON -clamp_value latch -isolation_signal U_PC/ISE -isolation_sense high
# [ICC2]  icc2_shell
create_mv_cells
report_mv_cells

What To Check

• Each PD_COP output has a clamp chosen from its receiver, not a domain-wide default.
• Active-low signals are clamped to 1.
• Latch strategies map to real latch-type isolation cells.
• Power-aware simulation shows receivers idle during every PD_COP off period.

Healthy, Suspicious & Hard-stop Results

• Healthy (illustrative): req and irq sit behind AND-type cells, rst_n behind an OR-type cell, and cfg behind a latch cell, all on SS_AON.
• Suspicious (illustrative): One domain-wide strategy clamps every output to 0, including an active-low signal.
• Hard stop: rst_n clamped to 0: the PD_MYCHIP logic it feeds sits in reset for as long as PD_COP is off.

What The Interviewer Is Testing

• Do you choose clamp values per signal from the receiver side?
• Do you know which gate type implements each clamp?

Follow-up Question & Model Response

"Why not use latch everywhere and let every signal keep its last value?"

Candidate Model Response: Because a held value is only safe if the receiver expects it to stay valid. An interrupt or request frozen high looks like a real event forever. Latch cells are also larger and need their enable timing checked so they capture a settled value. Use latch only where the receiver genuinely needs the last value, such as configuration.