Which inputs must a physical-design engineer verify at this gate?
From PDVerse PnR Interview Handbook, part of the pdVerse Mentor Guide
Short Answer
This gate is really a verification checklist run before you commit to floorplanning: netlist, SDC, top module name, handoff revision, logical libraries, reference/technology setup, modes/corners/scenarios, and whatever synthesis or STA summaries the upstream team can hand you. Every one of these should resolve to named, real objects you can point to — a listed clock that actually exists, a top name that actually matches the loaded hierarchy — not just files that happened to load without error.
Technical Explanation
- The whole point is reproducibility: another engineer, given the same handoff package, should verify the same items and reach the same conclusion.
Visual Verification
A complete physical design handoff requires structural netlists, timing constraints (SDC), physical models (LEF/Frame), timing libraries (.lib), RC tech files (TLU+), and power intent (UPF).
What To Check
- Warning sign: Files come from different revisions and still parse individually.
- Inspect: Start with one named object in the report and trace it to the netlist, library, or SDC statement that created it.
- Correct: Reconcile the manifest with the producing teams and replace the inconsistent bundle as a unit.
Command Checks & Actions
- current_block: confirms the active design block
- report_ref_libs: shows the reference libraries used for linking
- report_scenarios: shows the MCMM scenario matrix and analysis status
Run the commands in order. Each line answers a separate part of the check.
Healthy, Suspicious & Hard-stop Results
- Expected: Verify the synthesised gate-level netlist, SDC, top name, handoff revision, logical libraries, reference/technology setup, modes, corners, scenarios, and available synthesis or STA summaries.
- Stop before floorplanning when required logic or timing coverage is missing or unexplained.
Common Mistake
The Trap: Do not assume the check passed just because ICC2 continued. Fix or narrowly justify the named objects, then rerun the same command.
What The Interviewer Is Testing
Be ready to explain why this matters before floorplanning.
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