What is NLDM (Non-Linear Delay Model)?
From PDVerse STA Mentor Guide, part of the pdVerse Mentor Guide
Short Answer
NLDM (Non-Linear Delay Model) is the classic way a Liberty library stores cell delay — a two-dimensional lookup table indexed by input slew and output load, with the tool interpolating between the table's measured points for any value in between.
Technical Explanation
NLDM answers a simple question the hard way: rather than deriving delay from a formula, the library simply measured it at a grid of points and lets the tool read off the closest match.
- The lookup table: a typical NLDM table might have seven input-slew rows and seven output-load columns, each cell holding a delay value measured by circuit simulation ahead of time.
- Interpolation: for a slew or load that falls between two grid points, the tool interpolates between the nearest table entries rather than re-simulating anything.
- The load assumption behind it: NLDM treats everything the cell drives as one lumped capacitor, ignoring how that load is actually shaped or how resistive the wire to it is.
- Where that assumption breaks down: on modern processes, wire resistance between the driver and its load is large enough that a lumped-capacitance view measurably mispredicts delay.
- What replaces it there: current-source models such as CCS represent the driver as a time-varying current source instead of a fixed voltage source, capturing that resistive interaction that NLDM cannot see.
Common Mistake
The Trap: Assuming NLDM is accurate enough for signoff on any process node, simply because it has worked fine on older designs.
- On a process with resistive interconnect, a lumped-capacitance model measurably mispredicts delay against a current-source model.
- Signoff flows on advanced nodes typically require a current-source model instead, precisely because NLDM's own assumption stops holding there.
Follow-up Question & Model Response
What specifically does a current-source model like CCS capture that a lumped-capacitance model like NLDM cannot?
Candidate Model Response: CCS represents the driving cell's output as a current source whose value changes over time, which can interact properly with the actual resistive-capacitive network of the wire it drives, instead of assuming that whole network collapses into one capacitor. That interaction matters most when the wire's own resistance is large enough to shield part of the downstream capacitance from the driver, something a single lumped value cannot represent. The result is a delay number that tracks much closer to a full circuit simulation on interconnect-dominated nets.
Practical Example
A buffer driving a long, resistive net shows 95 ps of delay under an NLDM lumped-capacitance model, but 122 ps under a current-source model that accounts for the wire's own resistance shielding part of the load — a 27 ps gap that can be the difference between a passing and failing setup path.
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